Senior Engineer, Design Verification

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

What You Can Expect

Developverification plans for complex designs.Verifycomplex SoCs through simulation of register-transfer level (RTL) and gate level designs using industry standard tools and processes.Collaborate closely with design and other verification engineers to develop and implement verification test plans and drive verificationmethodologywork. Develop constrained-random verification test environment using Verilog/System Verilog, UVM and C programming, including testbenches, checkers, monitors, drivers and other testbench components.Use problem solving skills to debug failing simulations and create test vectors and testing scenarios to exhaustively exercise a design. Drive and analyze test coverage metrics.

What We're Looking For

BS in Electrical/Computer Engineering with 2 years of relevant experience

Or MS in Electrical/Computer Engineering

Must have work/internship experience or completed graduate coursework/research in each of the following:

Synopsys VCS (simulation).

Synopsys Verdi (debugging and waveform analysis).

Verilog, SystemVerilog, UVM.

C/C++ and Python scripting.

RTL Design Debug.

Functional Verification, Assertion-Based Verification, Constrained Random Verification.

AMBA AXI4 Protocol. PCIe fundamentals.

Developing test plans and coverage models. Advanced Computer Architecture concepts.

Expected Base Pay Range (USD)

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.