SITECH TEST ENGINEERING MANAGER

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AMD is seeking a Test Engineering Manager to lead post-silicon test execution for advanced test chip programs. In this role, you will manage a team accountable for automated test equipment (ATE) hardware, software, test development, and large-scale data analysis. You will drive innovation in test methodology, quality, cost efficiency, and analytics, while partnering closely with design, DFT, manufacturing, packaging, and product teams. The results produced by your team will directly shape future product architectures and manufacturing adoption strategies.

The ideal candidate is a technically strong leader who combines deep test engineering experience with disciplined execution and clear communication. You are analytical, detail-oriented, and comfortable operating in ambiguity. You build trust within teams, collaborate effectively across organizations, and are able to influence technical direction through data-driven insights.

• Lead, mentor, and develop a team of ATE test and yield engineers
• Own execution of multiple concurrent test-chip programs across global test facilities
• Define and implement comprehensive test strategies including ATE hardware, software, fixtures, and lab equipment
• Partner with corporate test and DFT teams to align on test architecture and software infrastructure
• Develop and maintain a reusable library of scalable ATE test methods
• Lead debug of complex silicon, hardware, and software issues across the test flow
• Provide early design feedback on DFT and testability during pre-silicon phases
• Drive adoption of new test technologies to improve efficiency, coverage, and cost
• Analyze, interpret, and present silicon and yield data to senior technical and executive stakeholders

• Hands-on experience developing and debugging tests, patterns, and vectors on Automated Test Equipment (V93K, Teradyne, UFlex)
• Strong coding experience in algorithm design and deployment
• Demonstrated success leading engineering teams and managing complex, multi-site projects
• Strong yield analysis skills, including Pareto analysis, population characterization, and outlier isolation
• Experience presenting technical findings and recommendations to senior leadership
• Familiarity with advanced silicon technologies, DFT methodologies, and post-silicon validation flows

Bachelor or Master degree in Electrical Engineering, Computer Engineering, Manufacturing Engineering, or a related technical discipline.

LOCATION:

Austin, TX

This role is not eligible for visa sponsorship.

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.

This posting is for an existing vacancy.